TSMC's System-on-Wafer Platform Goes 3D: CoW-SoW Stacks Up the Chips

TSMC's System-on-Wafer Platform Goes 3D: CoW-SoW Stacks Up the Chips

TSMC is offering its System-on-Wafer integration technology, InFO-SoW, from 2020. So far, only Cerebras and Tesla have developed wafer-scale processor designs using it, while they have wafer-scale processors with excellent performance and power efficiency. are extremely complex to develop and produce. But TSMC believes that not only will wafer-scale designs increase usage, but that megatrends like AI and HPC will demand even more complex solutions: vertically stacked system-on-wafer designs.

Tesla Dojo's wafer-scale processors – the first solutions based on TSMC's InFO-SoW technology to be in mass production – have many advantages over typical system-in-packages (SiPs), including low-latency high-bandwidth core-to-core communication, very high performance and bandwidth density, relatively low power transmission network redundancy, high efficiency performance, and redundancy.

But with InFO-SoW and other wafer-scale integration methods, processor designers have to rely entirely on on-chip memory. This is perfectly adequate for many applications, but may not be sufficient for next-generation AI workloads. Additionally, with InFO-SoW, the entire wafer has to be processed using a single fabrication technology, which may not be optimal, or very expensive, for some designs.

So, with its next-generation system-on-wafer platform, TSMC plans to combine two of its packaging technologies: InFO-SoW and System on Integrated Chips (SoIC), which would allow it to stack memory or logic. will System-on-wafer using the chip-on-wafer (CoW) method. The CoW-SoW technology, which the company announced at its North American Technology Symposium, will be ready for mass production in 2027.

For now, TSMC is mostly talking about wafer-scale processors with HBM4 memory. And given that HBM4 stacks will feature a 2048-bit interface, its tight integration with logic is something the industry is considering.

“Therefore, in the future, using wafer-level integration will allow our customers to integrate even more logic and memory together,” said Kevin Zhang, vice president of business development at TSMC. “SoW is no longer a myth, it's something we're working with our customers to develop some of the products that already exist. This way they can put more computing, more energy into their AI cluster or (supercomputer). “Allows us to expand our capabilities to deliver cost-effective computing.”

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