TSMC 2nm Update: N2 In 2025, N2P Loses Backside Power, and NanoFlex Brings Optimal Cells
The Taiwanese semiconductor manufacturing company provided several key updates on its upcoming process technologies. North American Technology Symposium 2024. At the top level, TSMC's Plans for 2 nm are largely unchanged.: The company is on track to begin volume production of chips on its first-generation GAAFET N2 node in the second half of 2025, and N2P will succeed N2 in late 2026 – though the previously announced backside power Without delivery capabilities. Meanwhile, the entire N2 family will add TSMC's new NanoFlex capability, which allows chip designers to mix and match cells from different libraries to optimize performance, power, and area (PPA).
One of the key announcements at the event is TSMC's NanoFlex technology, which will be part of the company's complete N2 family of production nodes (2 nm-class, N2, N2P, N2X). NanoFlex will enable chip designers to mix and match cells from different libraries (high efficiency, low power, area efficient) within the same block design, allowing designers to optimize their chips for improved performance or lower power consumption. will allow the design to be fine-tuned.
TSMC's contemporary N3 fabrication process already supports a similar capability called Funflex, which also allows designers to use cells from different libraries. But because N2 relies on gate-all-around (GAAFET) nanosheet transistors, NanoFlex gives TSMC some extra control: First, TSMC can optimize channel width for efficiency and power, and then use smaller cells ( for area and power efficiency) or can make long cells. for up to 15% higher efficiency).
When it comes to timing, TSMC's N2 is set to enter risk production and high-volume manufacturing (HVM) in the second half of 2025, so it looks like we'll see N2 chips in retail devices in 2026. are going to. N3E, TSMC expects N2 to increase performance by 10% to 15% at the same power, or reduce power consumption by 25% to 30% at the same frequency and complexity. As for chip density, the foundry is looking at a 15 percent increase in density, which is a good degree of scaling by contemporary standards.
N2 will be followed by N2P with increased efficiency, as well as voltage-enhanced N2X in 2026. Although TSMC once said that N2P would add a backside power delivery network (BSPDN) in 2026, it appears that this will not happen and that N2P will use regular power delivery circuitry. The reason for this is unclear, but it seems that the company has decided not to add any expensive features to N2P, but to save it for its next-generation Node, which should also be available to consumers in late 2026. Will be available.
The N2 is expected to make a major power innovation: Super High Performance Metal Insulator Metal (SHPMIM) capacitorswhich are being added to improve the stability of power supply. The SHPMIM capacitor offers twice the capacity density of TSMC's existing Super High Density Metal Insulator Metal (SHDMIM) capacitors. Additionally, the new SHPMIM capacitor offers a 50% reduction in sheet resistance (Rs in Ohm/square) and resistance (Rc) compared to its predecessor.

