SK Hynix Partners With TSMC On HBM4 Memory & Next-Gen Packaging Technology Development, Eyes 2026 Release

SK Hynix Partners With TSMC On HBM4 Memory & Next-Gen Packaging Technology Development, Eyes 2026 Release

SK hynix has announced its partnership with TSMC to develop packaging technologies such as next-generation HBM4 memory and CoWoS 2.

SK hynix Enters HBM4 Memory Race: Partners with TSMC for Next-Gen Memory and Packaging Innovations

The announcement comes just a day after SK Heynckes. Samsung announced that it has started development and eye release of its HBM4 memory in 2025.. In this regard, the company will be ready for official volume release by 2026 with HBM4 and we can expect it to offer some exceptional speed with higher memory capabilities achieved by using 16-Hi stacks. will do SK Hynix is ​​also working with TSMC to accelerate next-generation packaging innovations such as CoWoS 2 that will play a key role in the development of next-generation AI and GPU accelerators from NVIDIA, AMD and Intel.

News for the newspaper: SK hynix Inc. (or “Company”, www.skhynix.com) announced today that it has recently signed a memorandum of understanding with TSMC to develop next-generation HBM and enhance logic and HBM integration through advanced packaging technology. The company plans to move forward with the development of HBM4, or the sixth generation of the HBM family, through this initiative, which will be mass-produced from 2026.

Image Source: SK Hyneks

SK hynix said the collaboration between the world leader in the AI ​​memory space and TSMC, a top global logic foundry, will lead to further innovations in HBM technology. The collaboration is also expected to achieve breakthroughs in memory performance through three-way collaboration between product design, foundry and memory suppliers.

  • SK hynix and TSMC signed MOU for cooperation in HBM4 development and next-generation packaging technology
  • SK hynix will adopt TSMC's advanced foundry process to drive HBM4 performance.
  • Product Design-Foundry-Memory Tripartite Collaboration to Break the Memory Performance Limit for AI Applications

Both companies will first focus on improving the performance of the base die that is mounted just below the HBM package. HBM is built by stacking a core DRAM die on top of a base die that has TSV technology, and a fixed number of layers in the DRAM stack are vertically connected to the core die in an HBM package with TSV. . The base die at the bottom is connected to the GPU, which controls the HBM.

“We expect a strong partnership with TSMC to help accelerate our efforts to open collaboration with our customers and develop the industry-leading HBM4,” said Justin Kim, president and AI Infra Head, SK hynix I said. “With this collaboration, we will further strengthen our market leadership as the total AI memory provider and compete in the custom memory platform space.”

“TSMC and SK hynix have already established a strong partnership over the years. We have worked together to integrate state-of-the-art logic and state-of-the-art HBM in delivering world-leading AI solutions,” said Dr. Kevin Zhang, said TSMC's Senior Vice President, Business Development and Overseas Operations Office, and Deputy Partner. Chief Operating Officer. “Looking forward to the next-generation HBM4, we are confident that we will continue to work together to provide the best integrated solutions to unlock new AI innovations for our common customers.”

SK Hyneks

SK hynix has used a proprietary technology to manufacture the base die up to the HBM3E, but plans to adopt TSMC's advanced logic process for the HBM4 base die to pack additional functionality into a limited space. It also helps SK hynix develop customized HBMs that meet customers' wide demands for performance and power efficiency.

SK hynix and TSMC also agreed to cooperate to improve the integration of HBM and TSMC's CoWoS.2 Assisting in responding to general user requests related to technology, HBM

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