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Intel Explores Silicon-Based Quantum Processors, Scaling Performance Massively

Intel Explores Silicon-Based Quantum Processors, Scaling Performance Massively

Intel's quantum hardware researchers developed a 300mm cryogenic probing process to collect high-volume data on the performance of spin-qubit devices across wafers using complementary metal-oxide-semiconductor (CMOS) manufacturing techniques.

Improvements in qubit device production, combined with high-throughput testing processes, enabled researchers to obtain significantly more data to analyze uniformity, a critical step needed to scale up quantum computers. The researchers also found that single-electron devices from these wafers perform well when acting as spin qubits, achieving 99.9 percent gate fidelity. This fidelity is among the highest reported for qubits made with all CMOS-industry manufacturing.

Otto Zeitz, a quantum hardware engineer at Intel Corporation, stands near a quantum cryoprober in Hillsboro, Oregon. The cryoprober can take a 300mm silicon wafer to an extraordinarily low temperature of 1.7 Kelvin – just a hair from absolute zero. (Credit: Intel Corporation)

The small size of spin qubits, measuring about 100 nanometers, makes them denser than other qubit types (eg, superconducting), allowing more complex quantum computers to be built on a chip of the same size. The fabrication approach was conducted using extreme ultraviolet (EUV) lithography, which allowed Intel to achieve these tight dimensions while also manufacturing in high volumes.

Realizing fault-tolerant quantum computers with millions of identical qubits will require highly reliable fabrication processes. Building on its legacy in transistor manufacturing expertise, Intel is at the forefront of making silicon spin qubits like transistors by leveraging its state-of-the-art 300-mm CMOS manufacturing techniques, which routinely produce billions of transistors per chip. Is.

Based on these results, Intel plans to use these techniques to add more interconnect layers to create 2D arrays to increase qubit count and connectivity, as well as to increase its industry manufacturing capabilities. Intends to demonstrate high-fidelity two-qubit gates in practice. However, the main priority will continue to be scaling quantum devices and improving performance with the next-generation quantum chip.

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