Cadence Showcases World's First PCIe 7.0 Connection Over Optics With 128 GT/s Transfer Speeds

Cadence Showcases World's First PCIe 7.0 Connection Over Optics With 128 GT/s Transfer Speeds

Cadence Systems, the renowned computing firm, has revealed the world's first 128GT/s PCIe 7.0 IP over optics, demonstrating the remarkable potential in the technology.

Cadence's latest PCIe 7.0 IPs are aimed at speed and efficiency, a highlight at DevCon.

(News for the newspaper): PCI-SIG DevCon 2024 was a big success for Cadence. We blogged, Cadence demonstrated a complete PCIe 7.0 solution at PCI-SIG DevCon '24 The day before the event to promote our IP solutions for PCIe 7.0, which resulted in a lot of traffic at our booth. All attendees were excited to see Cadence demonstrate robust TX and RX capabilities of 128GT/s PCIe 7.0 IP over a real-world, low-latency, asynchronous, linear optics connector.

We achieved and maintained a consistent, impressive pre-FEC BER of ~3E-8 (1E-6 required for PCIe spec) for the entire duration of the event, covering two full days without a single drop. This provides enough margin for RS FEC. As seen in the figure below, the receiver eye PAM4 histogram has good linearity and margin. This is the world's first stable demonstration of 128 GT/s TX and RX on off-the-shelf optical connectors – a major focus of this year's DevCon.

As a leader in PCIe, our PCIe controller architect Anish Mathew shared his valuable insight on an important topic: “Impact of UIO ECN on PCIe controller design and performance,” leading the Cadence design team in achieving this process. Highlighting the progress made since , Cadence had a dominant presence on the demo floor with a record number of PCIe demos:

  1. PCIe 7.0 over optics
  2. PCIe 7.0 Electrical
  3. PCIe 6.0 RP/EP interop back-to-back
  4. PCIe 6.0 protocol in FLIT mode with Lecroy Exerciser (at the Cadence booth)
  5. PCIe 6.0 protocol in FLIT mode (at the LeCroy booth)
  6. PCIe 6.0 JTOL with Anritsu and Tektronix devices (at the Tektronix booth)
  7. PCIe 6.0 protocol with Viavi Protocol Analyzer (at Viavi booth)
  8. PCIe 6.0 system-level interop demo with Gen5 platform (at SerialTek booth)

The Cadence team and its partners did a great job coordinating and setting up demos that worked flawlessly. It was the result of many weeks of hard work and dedication. Four different vendors featured our IP for PCIe 6.0. They attracted a lot of attention and diverted traffic to us.

News Source: Cadence

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